Analog Machine Learning at the Edge: A Lower-Power Architectural Approach

By Tom Doyle, CEO and Founder of Aspinity

Smart speakers small enough to fit in your pocket, untethered earbuds, voice-activated TV remotes, all of these rely on a powerful combination of on-device and in-cloud machine learning technology to understand and accurately respond to user voice commands. As the industry trends towards smaller, battery-powered voice-first devices while simultaneously integrating more of the machine learning into the “edge” device for improved privacy and efficiency, there is a constant trade-off between functionality and battery life.

That’s because the traditional edge-processing architecture of today’s voice-first devices is notoriously inefficient when it comes to power consumption. Such devices rely on a “digitize-first” model of processing voice data (see figure 1) in which the heaviest power consumers, like the analog-to-digital converter (ADC) and the digital signal processor (DSP), do all the heavy lifting up front, right at the start of the audio signal chain. They continuously digitize and analyze 100% of the ambient sound data as they search for a wake word, even if speech is not present and the only sound is noise. Because voice is spoken randomly and sporadically,  continuous digitization of sound wastes up to 90% of battery power.

Analyze First

The move to efficient edge computing requires a system approach, one that considers both data and power. The key driver is that all sensed data is analog, but today’s edge processing is digital and that is where the inefficiency lies. Fortunately, there’s a new edge-processing architecture on the horizon that eliminates the inefficiencies. We call it an “analyze-first” architecture (Figure 2) because this approach detects unique events from background noise while the data is still in its raw analog format, before it has been digitized, keeping the ADC and downstream processors in sleep mode until they are needed.

This power- and data-efficient analyze-first architecture is enabled by a new and innovative approach to analog computing called reconfigurable analog modular processor (RAMP). The trainable RAMP incorporates sensor interfacing, analog feature extraction, and an analog neural network into an ultra-low power all-analog processor that can identify and classify critical data earlier in the signal chain, while it is still analog. Rather than focusing on integrating machine learning into a single chip, a RAMP processor enables a shift to a neuromorphic architecture in which always-on sensing systems spend minimal energy up front in order to save the most power intensive processing for the important information.

With an analyze-first architecture, we can reduce system power consumption in a battery-powered voice-first device by up to 10x – allowing, say, a pair of wireless earbuds to run for a whole day, rather than just a few hours, on a single charge – and enabling designers of wireless, always-on sensing devices to move more of the data analytics into the device without sacrificing battery life (see the video below with the details).

Not Your Grandparents’ Analog

This small, compact, all-analog core incorporates sensor interfacing, analog feature extraction, and an analog neural network. The large-signal characteristics of a small number of transistors are leveraged to develop an architecture of modular, parallel and continuously operating analog blocks. Each of these blocks is implemented in a much smaller and more efficient programmable footprint than traditional analog circuits.

The RAMP configures the analog blocks for typical digital tasks such as signal analysis and compression, as well as more complex tasks such as feature extraction, event detection and classification. These capabilities support early event detection from raw, unstructured analog sensor data and eliminate the inefficiencies that result from digitizing irrelevant sensor data for digital processing.

RAMP’s analog blocks are flexible and configurable so that a single analog core can be reprogrammed with application-specific algorithms to detect both different events and types of sensor input. The processor also supports multiple types of output for a wide range of applications. Luckily, RAMP system designers do not need to be analog experts: RAMP’s development environment is easy to use and should feel very familiar to engineers accustomed to programming digital processors.

Saving the Battery In Always-On Devices

With so many ways to program a RAMP core, as well as algorithm support for multiple types of analysis and output, RAMP technology enables smaller, lower-cost, more power- and data-efficient, battery-operated always-on devices for consumer, as well as Internet of Things and industrial applications, such as:

  • Voice-First: The RAMP can keep the wake-word engine and other digital processors in a low-power sleep state for the >80% of the time that no voice is present. RAMP also uses a patented approach to compress 500ms of pre-roll data, which does not affect the accuracy of wake word engines.
  • Acoustic-Event Detection: The RAMP can be programmed to detect specific non-voice audio events. Only when it detects a specified sound, such as a specific type of alarm, such as a dog bark or a glass break, will the RAMP wake up the rest of the always-listening system to alert the user that an event has been detected.
  • Equipment Monitoring: The RAMP can sample and select only the most important data points from thousands of points of sensor data, compressing the quantity of vibration data into a reduced number of frequency/energy pairs and significantly decreasing the amount of data collected and transmitted for analysis, leading to a more easily deployable, battery-operated, wireless sensor system for preventive and predictive maintenance systems.


The industry needs a more efficient solution for pushing more intelligence to the edge if the next generation of portable, always-on sensing devices are going to have reasonable battery lifetimes.  This is especially true if we ultimately want to deliver completely localized always-on sensing systems for devices that need only a limited keyword vocabulary or devices that sense other acoustic events such as glass break or alarms.

RAMP analog machine learning technology revolutionizes the way that we can approach the design of always-on sensing systems to eliminate the power and data inefficiencies. With an analyze-first architecture, system designers no longer have to trade functionality for battery life and will be able to build consumer-pleasing products that are truly long-playing and mobile – exactly what consumers want most.

About the Author

Tom Doyle is CEO and founder of Aspinity, a company enabling the next generation of intelligent edge processing with its RAMP IC.  Doyle  brings over 30 years of experience in operational excellence and executive leadership in analog and mixed-signal semiconductor technology to Aspinity.  He holds a B.S. in Electrical Engineering from West Virginia University and an MBA from California State University, Long Beach. For more information, visit Aspinity.

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